Visualization of Harmonic Load-Pull Measurements

The target of this process is to find the transistor’s optimal operating condition which leads to an output power higher than 36dBm with a dissipated power lower than 2W associated to efficiency higher than 70%.

Step 1/6: Optimization of the fundamental load impedance 

This part of the job highlights the "Extended load pull” viewer plugin of IVCAD. It explains how to combine power sweeps and impedance sweeps measurements to find the optimal load impedance @ f0.

This tool offers the possibility to visualize the optimal load impedance for fixed conditions (fixed transistor input power, fixed source power, fixed gain compression ect.). The main advantage is one does not have to perform new measurements each time a new fixed parameter is defined.
In this part, for each curve, the source impedance is matched on the conjugated transistor’s input impedance measured at low level.

Step 2/6: Determination of the best source impedance.

This plug-in allows determining the best source impedance for a given load impedance.

With this tool, simultaneous optimization of both source and load pull impedances has been really improved, even for complex optimization targets.

In this example, this plug-in is used to find the source impedance which offers the best efficiency.

Step 3/6: Determination of the best fundamental load impedance combined with the optimal Zsource.

In the previous steps, several source impedances have been defined. That is to say, one source impedance for each transistor’s output impedance measured in linear operating conditions.
Using the “Global Zsource” functionnality, here the user defines the value of one common source impedance for all the power sweep curves, whatever the load impedance.
In these new conditions, a new optimal load impedance can be redefined.

Step 4/6: Determination of the best load impedance at the 2f0 harmonic frequency.

In order to increase the efficiency, let’s optimize the load impedance at 2*f0. The measurements are done in the transistor’s extrinsic reference planes, the Class F operating condition is targeted.
Using the “impedance sweep” chart type, we can observe the influence of the second harmonic termination on the output power generated at all the harmonic frequencies, and on the fundamental transducer efficiency.
Between the worth and the best case, we observe that the efficiency has been increased from 38% to 70%.

Step 5/6: Determination of the best load impedance at the 3f0 harmonic frequency.

As previsoulsy, the objective is still the efficiency optimization. Let’s now optimize the load impedance at 3*f0.
In this example, we will see that the best and worth operating conditions are not far away on the smith chart.
Here the influence is not so obvious, during the third harmonic optimization; the efficiency has been increased from 63% to 73%. If Zload@3f0 is set on 50Ohms, the efficiency is about 70%.

Step 6/6: Final Step, power measurements with harmonic terminations matched for efficiency.

Using the "Power Sweep" graph in the "Load Pull" viewer, lets now compare the efficiency improvement bring by the harmonic load pull optimization.
We will see that the harmonic tuning could be very important to be compliant with maximum dissipated power ratings.

This set of videos has been developped to hilight the IVCAD plugins dedicated to load pull measurements.
See also IVCAD plugin for pulsed IV and S parameter measurements, as well as behavioral + equivalent circuit nonlinear model developments.